The present invention relates to a current limiting apparatus, and in detail, to a current limiting apparatus for used in a single body power source apparatus and an integrated circuit measuring apparatus.
Referring to FIG. 5 to FIG. 8, the conventional current limiting apparatus will be described. FIG. 5 is a view showing the circuit structure of a conventional current limiting apparatus 200. In FIG. 5, the conventional current limiting apparatus is structured by a CPU 1, D/A converters 2A, and 2B, resistors 3A, 3B, and 3D, operational amplifiers 4A and 4B, transistor 5, and capacitor 10. In this conventional current limiting apparatus 200, its one end is connected to a load 11 structured by a DUT (Device Under Test).
Initially, the structure of this conventional current limiting circuit 200 will be described below. The CPU 1 is connected to the D/A converter 2A and D/A converter 2B, and an output terminal of the D/A converter 2A is connected to a reversal input terminal of the operational amplifier 4A through the resistor 3A. Further, non-reversal input terminal of the operational amplifier 4A is electrically grounded. The output terminal of the operational amplifier 4A is connected to one end of the capacitor 10 and the load 11. Further, the other end of the capacitor 10 is electrically grounded. One end of the capacitor 10 and the load 11 are connected to the reversal input terminal of the operational amplifier 4A through a feedback resistor 3B. Thereby, a negative feedback closed loop is formed between the output terminal and the reversal input terminal of the operational amplifier 4A.
Further, the operational amplifier 4A has a current limiting adjustment terminal A, and the current limiting adjustment terminal A is connected to the collector terminal of the transistor 5. The output terminal of the operational amplifier 4B is connected to the base terminal of the transistor 5, and the output terminal of the D/A converter 2B is connected to the non-reversal input terminal of the operational amplifier 4B. The emitter terminal of the transistor 5 is connected to a negative source terminal B through the resistor 3D. Further, the emitter terminal of the transistor 5 is connected to the reversal input terminal of the operational amplifier 4B. Thereby, the negative feedback closed loop is formed between the output terminal of the operational amplifier 4B and the reversal input terminal of the operational amplifier 4B through the emitter terminal of the transistor 5.
Next, the operation of the conventional current limiting apparatus 200 in FIG. 5 will be described. The function of this conventional current limiting apparatus 200 can be divided into 2 kinds of functions, that is, the current limiting function to limit the output current IO of the operational amplifier 4A by the CPU 1, and the function in which the input voltage VIN is set by the CPU 1, and the current IO required by the load 11 is supplied from the operational amplifier 4A.
Initially, the function to limit the output current IO will be described. The CPU 1 sets the voltage to limit the output current IO of the operational amplifier 4A by the digital signal, and outputs to the D/A converter 2B. The D/A converter 2B converts the inputted digital signal into analog signal, and outputs to the non-reversal input terminal of the operational amplifier 4B. When this analog signal is inputted, the operational amplifier 4B generates the potential difference between the base and emitter of the transistor 5, and the current flows from the base to the emitter. Thereby, the transistor 5 is operated, and the limiting current IA flowing through the current limiting adjustment terminal A of the operational amplifier 4A is determined according to the relationship of the negative source terminal B, emitter voltage, and resistor 3D.
When the resistance value of the resistor 3D is RD, and the voltage value of the negative source terminal B is VB, then, the emitter voltage of the transistor 5 is set by the digital signal outputted from the CPU 1, and is equal to the voltage value VC converted into the analog value by the D/A converter 2B, therefore, the limiting current IA flowing in the current limiting adjustment terminal A is
IA=(VCxe2x88x92VB)/RDxe2x80x83xe2x80x83(1).
As described above, by limiting the current flowing in the current limiting adjustment terminal A of the operational amplifier 4A, the output current IO of the operational amplifier 4A is limited so that the input current into the load 11 is not excessive. Further, the following relationship exists between the output current IO of the operational amplifier 4A and the limiting current IA flowing in the current limiting adjustment terminal A:
IO=IAxc2x7Gxe2x80x83xe2x80x83(2).
Herein, G is a current amplification factor of the operational amplifier 4A. By using the above expressions (1) and (2), the following relational expression is obtained between the current limit voltage VC set by the CPU 1 and the output current IO:
IO=Gxc2x7(VCxe2x88x92VB)/RDxe2x80x83xe2x80x83(3).
In this expression (3), as shown in FIG. 6, the output current IO has a proportional relationship to the current limit voltage VC set by the CPU 1.
Next, the function to supply the current to the load 11 in the setting of the input voltage will be described. In the conventional current limiting apparatus 200, the CPU 1 sets the digital signal corresponding to the input setting voltage and outputs to the D/A converter 2A, and the D/A converter 2A converts the inputted digital signal into the analog signal and outputs to the resistor 3A. This analog signal is inputted into the reversal input terminal of the operational amplifier 4A through the resistor 3A, and this operational amplifier 4A amplifies the output voltage to the input setting voltage corresponding to this inputted analog signal. The voltage amplified by the operational amplifier 4A is outputted to the load 11, and the operational amplifier 4A outputs the current IO to be supplied to the load 11. In this case, the capacitor 10 is charged when the output current flows.
Herein, when the value of the voltage inputted into the reversal input terminal of the operational amplifier 4A by the digital signal outputted by the CPU 1, is VIN, the resistance value of the resistor 3A is R1, and the resistance value of the feedback resistor 3B is R2, then, the value VO of the voltage supplied to the load 11 is as follows:
VO=xe2x88x92(R2/R1)xc2x7VINxe2x80x83xe2x80x83(4).
By this expression (4), the output voltage VO is determined by the input setting voltage VIN. When the capacity of the capacitor 10 is C, the value of the output current is IO, and the value of the output voltage is VO, then, the time t necessary for charging the capacitor is,
t=(Cxc2x7VO)/IOxe2x80x83xe2x80x83(5),
and when the expression (4) is substituted into the expression (5), it can be clear that the time t necessary for charging the capacitor is, as shown by the following expression, formed of the relationship of the input voltage VIN and output current IO:
t=xe2x88x92Cxc2x7(R2/R1)xc2x7(VIN/IO)xe2x80x83xe2x80x83(6)
As described above, when the input voltage VIN is set by the CPU 1, because C, R1, and R2 are respectively known capacity of the capacitor 10, resistance values of the resistors 3A and 3B, the time t necessary for charging the capacitor 10 depends on only the output current IO.
FIG. 7 is a view showing the relationship of t xe2x88x92IO in the expression (6). As can be clearly seen from FIG. 7, the output current IO and the time t are in inversely proportional relationship to each other. In the case where the charging current for charging the capacitor 10 is IC, when the output current IO is smaller than the charging current IC, because a long period of time is necessary for charging the capacitor 10, the time t for supplying the current to the load 11 is increased.
However, in the conventional current limiting apparatus 200, by outputting the digital signal from the CPU 1 to the operational amplifier 4B through the D/A converter 2B, when the limiting current IA of the operational amplifier 4A is set, the output current IO of the operational amplifier 4A is limited by the limiting current IA, and when the current is supplied to the load 11, the current is limited lower than the current drive capacity. That is, when the current required by the load 11 is supplied, as the limiting current IA flowing from the current limiting adjustment terminal A set by the CPU 1 is closer to the limited output current IO, the current drive capacity is close to the limit, and there is a problem that a long period of time is necessary for reaching the current required by the load 11.
As the result, when the input voltage VIN is applied, because the current satisfying the load 11 is limited by the limiting current IA, the output voltage VO becomes a function proportional to the t1 in FIG. 8. Further, when the capacitor 10 is added to absorb the fluctuation of the voltage supplied to the load 11, because the time to charge the capacitor 10 is necessary, for the current to charge the capacitor 10, due to the limiting current IA, the output voltage has the relationship of the integral function proportional to the time t2 shown in FIG. 8, and there is also a problem that the time for supplying the current to the load 11 is further increased.
Furthermore, even when the maximum current of the operational amplifier 4A is sufficiently larger than the output current IO limited by the CPU 1, and the current drive capacity of the operational amplifier 4A is sufficient, the output current IO is limited by the limiting current IA set by the CPU 1.
A problem of the present invention is to provide a current limiting apparatus by which the setting voltage can be supplied onto the load more quickly, without the output current being limited by the limiting current of the operational amplifier.
In order to solve the problems, in the invention according to the first aspect, a current limiting apparatus, in which a power source signal output means (for example, a D/A converter 2A in FIG. 1) for outputting a voltage signal to supply a power source to a sample to be measured (for example, a load 11 in FIG. 1), a signal amplifying means (for example, a reversal amplifier circuit structured by resistors 3A and 3B and an operational amplifier 4A in FIG. 1) for amplifying the voltage signal outputted by the power source signal output means, a power source fluctuation absorption means (for example, a capacitor 10 in FIG. 1) for absorbing the fluctuation of the power source supplied to the sample to be measured by the voltage signal amplified by the signal amplifying means, and an amplification factor setting means (for example, a D/A converter 2B, operational amplifier 4B, transistor 5, and resistor 3D in FIG. 1) for setting a amplification factor in the signal amplifying means, are provided, the current limiting apparatus is characterized in that, it has: a current detection means (for example, a current detection circuit 7 to detect the current flowing through a resistor 3C in FIG. 1) for detecting a current value to be inputted into the sample to be measured; a voltage calculation means (for example, a current detection circuit 7 to calculate a voltage value according to a value of the current flowing through the resistor 3C in FIG. 1) for calculating the voltage at the current detection position, according to the current value detected by the current detection means; a voltage setting means (for example, the setting voltage stored in a CPU 1 in FIG. 1) for setting the predetermined voltage; a voltage comparing means (for example, a comparing circuit 8 in FIG. 1) for comparing the voltage value set by the voltage setting means to the voltage value calculated by the voltage calculation means; and an amplification factor changing means (for example, resistors 3E and 3F, a diode 6, and switch 9 in FIG. 1) for changing the setting of the amplification factor of the amplification factor setting means, according to the comparison result of the voltage comparing means.
According to the invention of the first aspect, in a current limiting apparatus, in which a power source signal output means for outputting a voltage signal to supply a power source to a sample to be measured, a signal amplifying means for amplifying the voltage signal outputted by the power source signal output means, a power source fluctuation absorption means for absorbing the fluctuation of the power source supplied to the sample to be measured by the voltage signal amplified by the signal amplifying means, and an amplification factor setting means for setting a amplification factor in the signal amplifying means, are provided, a current detection means detects a current value to be inputted into the sample to be measured; a voltage calculation means calculates the voltage at the current detection position, according to the current value detected by the current detection means; a voltage setting means sets the predetermined voltage; a voltage comparing means compares the voltage value set by the voltage setting means to the voltage value calculated by the voltage calculation means; and an amplification factor changing means changes the setting of the amplification factor of the amplification factor setting means, according to the comparison result of the voltage comparing means.
Further, like as the invention according to the second aspect, in the current limiting apparatus of the first aspect, the amplification factor changing means may be structured such that, when the voltage comparing means detects that the voltage value calculated by the voltage calculation means is larger than the predetermined voltage value set by the voltage setting means, the setting of the amplification factor of the amplification factor setting means is made smaller.
Further, like as the invention according to the third aspect, in the current limiting apparatus of the first or the second aspect, the amplification factor changing means may be structured such that it includes a diode (for example, a diode 6 in FIG. 1) and a switch (for example, a switch 9 in FIG. 1), and by ON/OFF-controlling the switch, the setting of the amplification factor of the amplification factor setting means is changed.
Accordingly, according to the invention of the first aspect to the third aspect, the power source voltage can be quickly applied onto the sample to be measured, and in the overall test, the test time of the sample to be measured can be reduced.